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  document number: 37006 revision 16-nov-00 www.vishay.com 2 APD-128G032 vishay dale plasma display modules 128 x 32 graphics display with drive electronics and ttl level data interface features ttl level video interface. large characters. highly visible for long distance viewing. > 30:1 contrast ratio. bright and pleasant neon orange color. slim profile. very affordable. electrical specifications voltage (s) required: + 75 vdc, v sp . - 110 vdc, v sn . + 5 vdc, v cc . + 12 vdc (- 98 vdc), v rw . (12 vdc to be referenced to - 110 vdc.) power required: typical = 12 watts. maximum = 45 watts. optical specifications viewing area: 12.75" [323.8mm] w x 3.15" [80.01mm] l. character array: 8 x 8: 16 x 4. 6 x 8: 21 x 4. character size: 0.65" [16.51mm] h x 0.45" [11.43mm] w. pixel size: 0.050" [1.27mm]. pixel pitch: 0.100" [2.54mm]. luminance: 50 foot lamberts. the APD-128G032 dc plasma display offers viewing qualities designers seek such as high contrast, viewing angle of 150 minimum and long distance readability. its bright (50 foot lambert minimum) with characters and graphics figures presented in a pleasing neon orange color against a black background. plasma is much more readable and eye-pleasing than liquid crystal or vacuum fluorescent displays and is filterable to red, amber or neutral density. these plasma display panels are driven in a standard row-column refresh method much like a crt display. the designer need only supply ttl level signals for serial data, dot clock, column latch, row data, row clock and display enable. the serial data is entered with the dot clock up to frequencies as high as 8mhz. after a row of 128 pixels is clocked in, the column latch signal is toggled and the data is latched. at the time the data is latched, the display is briefl y disabled using the display enable signal, then the row pointer is advanced with the row clock signal. once each frame the row data must be asserted to synchronize the column serial data with the beginning row. the recommended scanning frequency is approximately 70hz, but may be as high as 200hz. the high clock rate on the data clock allows for rapid refresh and maximum access time to the refresh ram. *recommended operating voltages . all maximums are absolute maximum. **v rw is referenced to v sn . description part number display, driver electronics and ttl interface .................................................................................. .......................................... APD-128G032 data connector kit ............................................................................................................. ............................................................... 280105-05 power connector kit ............................................................................................................ .............................................................. 280108-12 ordering information standard electrical specifications* description symbol min. typ. max. units logic supply v cc + 4.5 + 5.0 + 5.5 vdc anode supply v sp + 75 + 80.0 vdc cathode supply v sn - 110 - 125 vdc cathode control** v rw + 10.8 + 12.0 + 15.0 vdc total v sp and v sn v tot 170 185 205 vdc logic 1 input v ih 2.0 vdc logic 0 input v il 0.8 vdc dimensions in inches [millimeters] 0.395 [10.033] pin #1 of p2 pin #1 of p1 0.062 [1.575] pcb thickness 7.4 [187.96] 14.5 [368.3] mounting holes 0.150 [3.81] dia. 6 places 2.463 [62.56] 7.25 [184.15] 0.150 [3.81] 14.80 [375.92] 13.775 [349.88] 1.025 [26.035] 0.888 [22.56] 0.487 [12.37] 3.15 [80.01] 4.075 [103.50] 4.625 [117.48] 4.925 [125.10] 0.150 [3.81] 12.75 [323.85]


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